Morris Mano Digital Design 6th Edition Solutions May 2026

5.1) (a) SR latch, (b) D flip-flop

7.3) (a) PROM, (b) EPROM

3.2) F = (x + y)'(x' + y')

4.3) (a) 3-bit binary adder, (b) 4-bit binary subtractor

6.3) (a) Asynchronous sequential circuit, (b) Synchronous sequential circuit Morris Mano Digital Design 6th Edition Solutions

3.1) F = x'y' + xy

8.2) (a) CPU, (b) Memory

8.3) (a) Serial, (b) Parallel